Felix Höfling, Freie Universität Berlin
"What is... massively parallel computing?"
In the past two decades, computing architectures have seen a paradigm shift towards on-chip parallelisation, which has been perfected in many-core accelerators (GPUs, MICs). Such processors have boosted the current success of machine learning approaches and, being versatile devices for general computing tasks, find applications in diverse other fields. A single chip can perform several thousand computations simultaneously, at the price of a reduced flexibility of the instruction pipeline. Making this technology accessible to a larger class of applications requires numerical tasks that exhibit a massive parallelism, which may be achieved by rethinking our implementations of standard algorithms.